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? 2010-2014 microchip technology inc. ds20002230f-page 1 mcp2003/4/3a/4a features: the mcp2003/2003a and mcp2004/2004a are compliant with local interconnect network (lin) bus specifications 1.3, 2.0 and 2.1 and are compliant to sae j2602 support baud rates up to 20 kbaud ? with lin-compatible output driver 43v load dump protected very low high electromagnetic immunity (emi) meets stringent original equipment manufactur- ers (oem) requirements very high electrostatic discharge (esd) immunity: ->20kv on v bb (iec 61000-4-2) ->14kv on l bus (iec 61000-4-2) very high immunity to rf disturbances meets stringent oem requirements wide supply voltage, 6.0v-27.0v continuous extended temperature range: -40 to +125c interface to pic ? mcu eusart and standard usarts lin bus pin: - internal pull-up resistor and diode - protected against battery shorts - protected against loss of ground - high current drive automatic thermal shutdown low-power mode: - receiver monitoring bus and transmitter off, ( ? 5a) description: this device provides a bidirectional, half-duplex communication, physical interface to automotive and industrial lin systems to meet the lin bus specification revision 2.1 and sae j2602. the device is short-circuit and over-temperature protected by internal circuitry. the device has been specifically designed to operate in the automotive operating environment and will survive all specified transient conditions while meeting all of the stringent quiescent current requirements. mcp200x family members: 8-pin pdip, dfn and soic packages: - mcp2003, lin-compatible driver, with wake pins, wake-up on falling edge of l bus - mcp2003a, lin-compatible driver, with wake pins, wake-up on rising edge of l bus - mcp2004, lin-compatible driver, with fault /txe pins, wake-up on falling edge of l bus - mcp2004a, lin-compatible driver, with fault /txe pins, wake-up on rising edge of l bus package types mcp2004/2004a pdip, soic fault /t xe cs/wake t xd v bb l bus 1 2 3 4 8 7 6 5 v ss v ren r xd mcp2003/2003a pdip, soic wake cs t xd v bb l bus 1 2 3 4 8 7 6 5 v ss v ren r xd mcp2003/2003a 4x4 dfn* wake cs t xd v bb l bus 1 2 3 4 8 7 6 5 v ss v ren r xd ep 9 mcp2004/2004a 4x4 dfn* fault /t xe cs/wake t xd v bb l bus 1 2 3 4 8 7 6 5 v ss v ren r xd ep 9 * includes exposed thermal pad (ep); see table 1-2 . lin j2602 transceiver downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 2 ? 2010-2014 microchip technology inc. mcp2003/2003a block diagram mcp2004/2004a block diagram ratiometric reference oc thermal protection v ren r xd t xd v bb l bus v ss ~30 k ? cs wake-up logic and power control short circuit protection 4.3v wake ratiometric reference oc thermal protection v ren fault/ txe r xd t xd v bb l bus v ss ~30 k ? cs/wake wake-up logic and power control short circuit protection 4.3v 4.3v downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 3 mcp2003/4/3a/4a 1.0 device overview the mcp2003/4/3a/4a devices provide a physical interface between a microcontroller and a lin bus. these devices will translate the cmos/ttl logic levels to lin logic level, and vice versa. it is intended for automotive and industrial applications with serial bus speeds up to 20 kbaud. lin bus specification revision 2.1 requires that the transceiver of all nodes in the system is connected via the lin pin, referenced to ground and with a maximum external termination resistance load of 510 ? from lin bus to battery supply. the 510 ?? corresponds to 1 master and 15 slave nodes. the v ren pin can be used to drive the logic input of an external voltage regulator. this pin is high in all modes except for power-down mode. 1.1 external protection 1.1.1 reverse battery protection an external reverse-battery-blocking diode should be used to provide polarity protection (see example 1-1 ). 1.1.2 transient voltage protection (load dump) an external 43v transient suppressor (tvs) diode, between v bb and ground, with a 50 ? transient protection resistor (r tp ) in series with the battery supply and the v bb pin serve to protect the device from power transients (see example 1-1 ) and esd events. while this protection is optional, it is considered good engineering practice. 1.2 internal protection 1.2.1 esd protection for component-level esd ratings, please refer to the maximum operation specifications. 1.2.2 ground loss protection the lin bus specification states that the lin pin must transition to the recessive state when ground is disconnected. therefore, a loss of ground effectively forces the lin line to a high-impedance level. 1.2.3 thermal protection the thermal protection circuit monitors the die temperature and is able to shut down the lin transmitter. there are two causes for a thermal overload. a thermal shutdown can be triggered by either, or both, of the following thermal overload conditions. lin bus output overload increase in die temperature due to increase in environment temperature driving the t xd and checking the r xd pin makes it possible to determine whether there is a bus contention (rx = low, tx = high) or a thermal overload condition (rx = high, tx = low). after a thermal overload event, the device will automatically recover once the die temperature has fallen below the recovery temperature threshold (see figure 1-1 ). figure 1-1: thermal shutdown state diagram operation mode transmitter shutdown lin bus shorted to v bb te m p < s h u td o w n temp downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 4 ? 2010-2014 microchip technology inc. 1.3 modes of operation for an overview of all operational modes, refer to table 1-1 . 1.3.1 power-down mode in power-down mode, everything is off except the wake-up section. this is the lowest power mode. the receiver is off, thus its output is open-drain. on cs going to a high level or a falling edge on wake (mcp2003/mcp2003a only), the device will enter ready mode as soon as internal voltage stabilizes. refer to section 2.4 ?ac specifications? for further information. in addition, lin bus activity will change the device from power-down mode to ready mode; mcp2003/4 wakes-up on a falling edge on l bus , followed by a low level lasting at least 20 s. mcp2003a/4a wakes-up on a rising edge on l bus , followed by a high level lasting 70 s typically. see figures 1-2 to 1-5 about remote wake-up. if cs is held high as the device transitions from power-down to ready mode, the device will transition to either operation or transmitter off mode, depending on t xd input, as soon as internal voltages stabilize. 1.3.2 ready mode upon entering the ready mode, v ren is enabled and the receiver detect circuit is powered up. the transmit- ter remains disabled and the device is ready to receive data but not to transmit. upon v bb supply pin power-on, the device will remain in ready mode as long as cs is low. when cs transitions high, the device will either enter operation mode, if t xd pin is held high, or the device will enter transmitter off mode, if t xd pin is held low. 1.3.3 operation mode in this mode, all internal modules are operational. the device will go into power-down mode on the falling edge of cs. for the mcp2003/4 device, a specific process should be followed to put all nodes into power- down mode. refer to section 1.6 ?mcp2003/4 and mcp2003a/4a difference details? and figure 1-6 . the device will enter transmitter off mode in the event of a fault condition, such as: thermal overload, bus contention and t xd timer expiration. the mcp2004/2004a device can also enter transmitter off mode if the fault /t xe pin is pulled low. the v bb to l bus pull-up resistor is connected only in operation mode. 1.3.4 transmitter off mode transmitter off mode is reached whenever the transmitter is disabled either due to a fault condition or pulling the fault /t xe pin low on the mcp2004/2004a. the fault conditions include: thermal overload, bus contention, r xd monitoring or t xd timer expiration. the device will go into power-down mode on the falling edge of cs, or return to operation mode if all faults are resolved and the fault /t xe pin on the mcp2004/2004a is high. figure 1-2: operational mod es state diagram ? mcp2003 por v ren off rx off tx off v bat > 5.5v ready v ren on rx on tx off toff mode v ren on rx on tx off operation mode v ren on rx on tx on power down v ren off rx off tx off cs = 1& t xd = 0 cs = 1& t xd = 1 cs = 1& t xd = 1& no fault fault (thermal or timer) cs = 0 falling edge on lin or cs = 1 or falling edge on wake pin cs = 0 downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 5 mcp2003/4/3a/4a figure 1-3: operational mode s state diagram ? mcp2003a figure 1-4: operational mod es state diagram ? mcp2004 por v ren off rx off tx off v bat > 5.5v ready v ren on rx off tx off toff mode v ren on rx on tx off operation mode v ren on rx on tx on power down v ren off rx off tx off cs = 1& t xd = 0 cs = 1& t xd = 1 cs = 1& t xd = 1& no fault fault (thermal or timer) cs = 0 rising edge on lin or cs = 1 or falling edge on wake pin cs = 0 por v ren off rx off tx off v bat > 5.5v ready v ren on rx on tx off toff mode v ren on r x on t x off operation mode v ren on rx on tx on power down v ren off rx off tx off cs = 1& (t xe = 0 or t xd = 0 ) cs = 1& t xd = 1& t xe = 1 cs = 1& t xd = 1& t xe = 1 & no fault fault (thermal or timeout) or fault/t xe = 0 cs = 0 falling edge on lin or cs = 1 cs = 0 downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 6 ? 2010-2014 microchip technology inc. figure 1-5: operational mod es state diagram ? mcp2004a table 1-1: overview of operational modes state transmitter receiver v ren operation comments por off off off check cs, if low then proceed to ready mode; if high, transitions to either t off or operation mode, depending on t xd (2003/a), or t xd and fault /t xe (2004/a). v bb > v bb ( min ) and internal supply stable ready off on on if cs is high level, then proceed to operation or t xoff mode. bus off state operation on on on if cs is low level, then proceed to power- down; if fault /t xe low level, then proceed to transmitter off mode. normal operation mode power-down off activity detect off on cs high level, proceed to ready mode then proceed to either operation mode or t xoff . mcp2003/2003a: falling edge on wake will put the device into ready mode. mcp2003/mcp2004: falling edge on lin bus will put the device into ready mode. mcp2003a/mcp2004a: rising edge on lin bus will put the device into ready mode. low-power mode transmitter off off on on if cs is low level, then proceed to power- down mode; if fault /t xe and t xd high, then proceed to operation mode fault /t xe only available on mcp2004/2004a por v ren off rx off tx off v bat > 5.5v ready v ren on rx on tx off toff mode v ren on rx on tx off operation mode v ren on rx on tx on power down v ren off rx off tx off cs = 1& (t xe = 0 or t xd = 0 ) cs = 1& t xd = 1 & t xe = 1 cs = 1& t xd = 1& t xe = 1& no fault fault (thermal or timeout) or fault/t xe = 0 cs = 0 rising edge on lin or cs = 1 cs = 0 downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 7 mcp2003/4/3a/4a 1.4 typical applications example 1-1: typical mcp2003/2003a application example 1-2: typical mcp2004/2004a application lin bus v bb l bus v ren t xd r xd v ss v dd t xd r xd +12 1.0 f cs i/o wake 50 ? 43v 1k ? +12 master node only +12 3.9 k ? wake-up voltage reg (1) note 1: for applications with current requirements of less than 20 ma, the connection to +12v can be deleted, and voltage to the regulator supplied directly from the v ren pin. 2: esd protection diode. 4.7 k ? optional resistor and transient suppressor 33 k ? mmbz27v 220pf (2) lin bus v bb l bus v ren t xd r xd v ss v dd t xd r xd 1.0 f cs/wake i/o fault /t xe i/o 50 ? 43v 1k ? +12 master node only +12 220 k ? wake-up voltage reg 100 nf 4.7 k ? +12 optional resistor and transient suppressor mmbz27v 220pf (2) (1) note 1: for applications with current requirements of less than 20 ma, the connection to +12v can be deleted, and voltage to the regulator supplied directly from the v ren pin. 2: esd protection diode. downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 8 ? 2010-2014 microchip technology inc. example 1-3: typical li n network configuration master (mcu) 1k ? v bb slave 1 (mcu) slave 2 (mcu) slave n <23 (mcu) 40m + return lin bus lin bus mcp200x lin bus mcp200x lin bus mcp200x lin bus mcp200x downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 9 mcp2003/4/3a/4a 1.5 pin descriptions table 1-2: pinout descriptions 1.5.1 receive data output (r xd ) the receive data output pin is an open drain (od) output and follows the state of the lin pin, except in power down mode. 1.5.1.1 r xd monitoring the r xd pin is internally monitored. it has to be at a high level (> 2.5v typical) while l bus is recessive. otherwise, an internal fault will be created and the device will transition to transmitter off mode. on the mcp2004/2004a, the f ault / t xe pin will be driven low to indicate the transmitter off state. 1.5.2 chip select (cs) this is the chip select input pin. an internal pull-down resistor will keep the cs pin low. this is done to ensure that no disruptive data will be present on the bus while the microcontroller is executing a power-on reset and an i/o initialization sequence. the pin must detect a high level to activate the transmitter. an internal low- pass filter, with a typical time constant of 10 s, prevents unwanted wake-up (or transition to power down mode) on glitches. if cs = 0 when the v bb supply is turned on, the device goes to ready mode as soon as internal voltages sta- bilize, and stays there as long as the cs pin is held low ( 0 ). in ready mode, the receiver is on, and the lin transmitter driver is off. if cs = 1 when the v bb supply is turned on, the device will proceed to operation mode, or t xoff (refer to figures 1-2 to 1-5 ), as soon as internal voltages stabilize. this pin may also be used as a local wake-up input (refer to example 1-1 ). in this implementation, the microcontroller i/o controlling the cs should be converted to a high-impedance input allowing the internal pull-down resistor to keep cs low. an external switch, or other source, can then wake-up both the transceiver and the microcontroller (if powered). refer to section 1.3 ?modes of operation? , for detailed operation of cs. 1.5.3 wake-up input (wake ) this pin is only available on the mcp2003/2003a. the wake pin has an internal 800 k ? pull-up to v bb . a falling edge on the wake pin causes the device to wake from power-down mode. upon waking, the mcp2003/3a will enter ready mode. pin name 8-lead pdip, soic 4x4 dfn mcp2003/2003a mcp2004/2004a normal operation normal operation r xd 1 1 receive data output (od), hv tolerant receive data output (od), hv tolerant cs 2 2 chip select (ttl), hv tolerant chip select/local wake (ttl), hv tolerant wake ( mcp2003/2003a only ) 3 3 wake-up, hv tolerant fault detect output (od) transmitter enable (ttl) hv tolerant fault /t xe ( mcp2004/2004a only ) t xd 4 4 transmit data input (ttl), hv tolerant transmit data input (ttl), hv tolerant v ss 5 5 ground ground l bus 6 6 lin bus (bidirectional) lin bus (bidirectional) v bb 7 7 battery positive battery positive v ren 8 8 voltage regulator enable output voltage regulator enable output ep 9 exposed thermal pad. do not electrically connect or connect to vss exposed thermal pad. do not electrically connect or connect to vss legend: ttl = ttl input buffer; od = open-drain output note: it is not recommended to tie cs high as this can result in the device entering operation mode before the microcontroller is initialized and may result in unintentional lin traffic. downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 10 ? 2010-2014 microchip technology inc. 1.5.4 fault /t xe this pin is only available on the mcp2004/2004a. this pin is bidirectional and allows disabling of the transmitter, as well as fault reporting related to disabling the transmitter. this pin is an open-drain output, with states as defined in table 1-3 . the transmitter is disabled whenever this pin is low ( 0 ), either from an internal fault condition or by an external drive. while the transmitter is disabled, the internal 30 k ? pull-up resistor on the l bus pin is also disconnected to reduce current. table 1-3: f ault / t xe truth table 1.5.5 transmit data input (t xd ) the transmit data input pin has an internal pull-up. the lin pin is low (dominant) when t xd is low, and high (recessive) when t xd is high. for extra bus security, t xd is internally forced to 1 whenever the transmitter is disabled regardless of external t xd voltage. 1.5.5.1 t xd dominant timeout if t xd is driven low for longer than approximately 25 ms, the l bus pin is switched to recessive mode and the part enters toff mode. this is to prevent the lin node from permanently driving the lin bus dominant. the transmitter is reenabled on t xd rising edge. 1.5.6 ground (v ss ) this is the ground pin. 1.5.7 lin bus (l bus ) the bidirectional lin bus pin (l bus ) is controlled by the t xd input. l bus has a current limited open collector output. to reduce emi, the edges during the signal changes are slope controlled and include corner rounding control for both falling and rising edges. the internal lin receiver observes the activities on the lin bus, and matches the output signal r xd to follow the state of the l bus pin. 1.5.7.1 bus dominant timer the bus dominant timer is an internal timer that deactivates the l bus transmitter after approximately 25 ms of dominant state on the l bus pin. the timer is reset on any recessive l bus state. the lin bus transmitter will be reenabled after a recessive state on the l bus pin as long as cs is high. disabling can be caused by the lin bus being externally held dominant, or by t xd being driven low. additionally, on the mcp2004/2004a, the fault pin will be driven low to indicate the transmitter off state. 1.5.8 battery (v bb ) this is the battery positive supply voltage pin. 1.5.9 voltage regulator enable output (v ren ) this is the external voltage regulator enable pin. open source output is pulled high to v bb in all modes, except power-down. 1.5.10 exposed thermal pad (ep) do not electrically connect, or connect to vss. note: the fault /t xe pin is true ( 0 ) whenever the internal circuits have detected a short or thermal excursion and have disabled the l bus output driver. t xd in r xd out lin bus i/o thermal override fault/ t xe definition external input driven output lhv bb off h l fault , t xd driven low, l bus shorted to v bb ( note 1 ) hh v bb off h h ok llg n d o f f h h ok hlg n d o f f h h ok , data is being received from l bus xxv bb on h l fault , transceiver in thermal shutdown xxv bb xlx no fault , the cpu is commanding the transceiver to turn off the transmitter driver legend: x = dont care. note 1: the fault /t xe is valid after approximately 25 s after t xd falling edge. this is to eliminate false fault reporting during bus propagation delays. downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 11 mcp2003/4/3a/4a 1.6 mcp2003/4 and mcp2003a/4a difference details the differences between the mcp2003/4 and the mcp2003/4a devices are isolated to the wake-up func- tionality. the changes were implemented to make the device more robust to lin bus conditions, outside of the normal operating conditions. the mcp2003/4 will wake-up from power-down mode during any lin falling edge held low longer than 20 s. in the case where a lin system is designed to minimize stand-by current by disconnecting all bus pull-ups resistors (including the external master pull-up resistor to v bb ), the original mcp2003/4 could wake-up, if the floating bus drifted to a valid low level. the mcp2003/4a revisions were modified to require a ris- ing edge after a valid low level. this will prevent an undesired system wake-up in this scenario, while main- taining functional capability with the original version. it should be noted that the original mcp2003/4 meets all lin transceiver specification requirements and mod- ules can be designed to pass all lin system require- ments. however, when all bus pull-up resistors are disconnected, the mcp2003/4 requires the module designer to write firmware to monitor the lin bus after any wake-up event to prevent the transceiver from automatically transitioning from ready mode to operational mode. if the mcp2003/4 is placed into operational mode, v bb to l bus pull-up resistor is automatically connected, which will raise the lin bus to a recessive level; then putting the device to power-down mode may cause l bus to be floating, and thus wake-up all bus nodes. to prevent this, the designer should ensure t xd (mcp2003) or t xe (mcp2004) is held low until valid bus activity is verified (see figure 1-6 ). this will ensure the transceiver transitions from ready mode to transmitter off mode, until bus activity can be verified. in the case of valid bus activity, the transceiver can shift to operation mode, while if there is no bus activity, the device can be again placed into power down. the design practices needed to accomplish this are fully detailed in tech brief tb3067 C mcp2003 power- down mode and wake-up handling in case of lin bus loss (ds93067). the revised mcp2003/4a devices now eliminate the need for firmware to prevent system wide wake-up. the revised devices now require a longer valid bus low (see updated t bdb value in section 2.3 ?dc specifi- cations? and figure 2-7 ), which enables a rising edge detect circuit. the device will now only wake-up after a rising edge, following a low longer than t bdb . while the module designer can still hold t xd (mcp2003) or t xe (mcp2004) low during wake-up, to enter transmit- ter off mode from ready mode, it is not required to prevent an advertent system wake-up. in addition to the longer t bdb value, the time from wake- up detect to v ren enable is shortened as documented in section 2.3 ?dc specifications? . figure 1-6: mcp2003/2004 switching timing diagram for the forced power- down mode sequence t xd v ren cs ready mode transmitter off mode power down mode after master sleep instruction power down mode t tx2cs ? 100 ns t csactive ? 100 s t xd to forced externally t xd state depending on how the slave microcontroller is powered l bus state lin bus disconnected downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 12 ? 2010-2014 microchip technology inc. 2.0 electrical characteristics 2.1 absolute maximum ratings? v in dc voltage on r xd , t xd , fault /t xe , cs .............................................................................................. -0.3 to +43v v in dc voltage on wake and v ren ............................................................................................................. -0.3 to +v bb v bb battery voltage, continuous, non-operating ( note 1 )............................................................................. -0.3 to +40v v bb battery voltage, non-operating (lin bus recessive) ( note 2 ) ................................................................ -0.3 to +43v v bb battery voltage, transient iso 7637 test 1 ................................................................................... .................. -200v v bb battery voltage, transient iso 7637 test 2a .................................................................................. .................+150v v bb battery voltage, transient iso 7637 test 3a .................................................................................. ................. -300v v bb battery voltage, transient iso 7637 test 3b .................................................................................. .................+200v v lbus bus voltage, continuous...................................................................................................................... -18 to +40v v lbus bus voltage, transient ( note 3 ) ........................................................................................................... -27 to +43v i lbus bus short circuit current limit ............................................................................................... .....................200 ma esd protection on lin, v bb , wake (iec 61000-4-2) ( note 4 )............................................................................... 8 kv esd protection on lin, v bb (human body model) ( note 5 ) ................................................................................... 8 kv esd protection on all other pins (human body model) ( note 5 ) ............................................................................ 4 kv esd protection on all pins (charge device model) ( note 6 )................................................................................... 2 kv esd protection on all pins (machine model) ( note 7 ).............................................................................................200v maximum junction temperature ................................................................................................... .......................... 150 ? c storage temperature...................................................................................................................................-65 to +150 ? c note 1: lin 2.x compliant specification. 2: sae j2602 compliant specification. 3: iso 7637/1 load dump compliant (t < 500 ms). 4: according to iec 61000-4-2, 330 ohm, 150 pf and transceiver emc test specifications [2] to [4]. for wake pin to meet the specification, series resistor must be in place (refer to example 1-2 ). 5: according to aec-q100-002/jesd22-a114. 6: according to aec-q100-011b. 7: according to aec-q100-003/jesd22-a115. 2.2 nomenclature used in this document some terms and names used in this data sheet deviate from those referred to in the lin specifications. equivalent values are shown below. ? notice : stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device, at those or any other conditions abov e those indicated in the operational listings of this specification, is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. lin 2.1 name term used in the following tables definition v bat not used ecu operating voltage v sup v bb supply voltage at device pin i bus _ lim i sc current limit of driver v busrec v ih (l bus ) recessive state v busdom v il (l bus ) dominant state downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 13 mcp2003/4/3a/4a 2.3 dc specifications dc specifications electrical characteristics: unless otherwise indicated, all limits are specified for v bb = 6.0v to 30.0v, t a = -40c to +125c parameter sym. min. typ. max. units conditions power v bb quiescent operating current i bbq 90 150 a operating mode, bus recessive ( note 1 ) v bb transmitter-off current i bbto 75 120 a transmitter off, bus recessive ( note 1 ) v bb power-down current i bbpd 5 1 5 a v bb current with v ss floating i bbnognd -1 1 ma v bb = 12v, gnd to v bb , v lin =0-27v microcontroller interface high-level input voltage (t xd , fault /t xe ) v ih 2.0 30 v low-level input voltage (t xd , fault /t xe ) v il -0.3 0.8 v high-level input current (t xd , fault /t xe ) i ih -2.5 a input voltage = 4.0v low-level input current (t xd , fault /t xe ) i il -10 a input voltage = 0.5v high-level voltage (v ren )v hvren -0.3 v bb +0.3 v high-level output current (v ren ) i hvren -40 -10 ma output voltage = v bb - 0.5v -125 -35 output voltage = v bb - 2.0v high-level input voltage (cs ) v ih 2.0 30 v through a current limiting resistor low-level input voltage (cs) v il -0.3 0.8 v high-level input current (cs) i ih 10.0 a input voltage = 4.0v low-level input current (cs) i il 5.0 a input voltage = 0.5v low-level input voltage (wake ) v il v bb C 4.0v v low-level output voltage (r xd ) v ol 0 . 4 v i in = 2 ma high-level output current (r xd ) i oh -1 -1 a v lin = v bb , v rxd = 5.5v note 1: internal current limited. 2.0 ms maximum recovery time (r lbus = 0 ? , tx = 0.4 v reg , v lbus = v bb ). 2: node has to sustain the current that can flow under this condition; bus must be operational under this condition. downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 14 ? 2010-2014 microchip technology inc. bus interface high-level input voltage v ih (l bus )0 . 6 v bb v recessive state low-level input voltage v il (l bus )- 80 . 4 v bb v dominant state input hysteresis v hys 0.175 v bb vv ih (l bus ) C v il (l bus ) low-level output current i ol (l bus ) 40 200 ma output voltage = 0.1 v bb , v bb = 12v high-level output current i oh (l bus ) 2 0 a pull-up current on input i pu (l bus )5 1 8 0 a ~ 3 0 k ? internal pull-up @ v ih (l bus ) = 0.7 v bb short circuit current limit i sc 50 200 ma ( note 1 ) high-level output voltage v oh (l bus )0 . 9 v bb v bb v driver dominant voltage v_ losup 1 . 2 v v bb = 7v, r load = 500 ? driver dominant voltage v_ hisup 2 . 0 v v bb = 18v, r load = 500 ? driver dominant voltage v_ losup -1 k 0.6 v v bb = 7v, r load = 1 k ? driver dominant voltage v_ hisup -1 k 0.8 v v bb = 18v, r load = 1 k ? input leakage current (at the receiver during dominant bus level) i bus _ pas _ dom -1 -0.4 ma driver off, v bus = 0v, v bb = 12v input leakage current (at the receiver during recessive bus level) i bus _ pas _ rec 12 20 a driver off, 8v < v bb < 18v 8v < v bu s < 18v v bus ? v bb leakage current (disconnected from ground) i bus _ no _ gnd -10 1.0 +10 a gnd device = v bb , 0v < v bus < 18v, v bb = 12v leakage current (disconnected from v bb ) i bus _ no _ vbb 1 0 a v bb = gnd, 0 < v bus < 18v, ( note 2 ) receiver center voltage v bus _ cnt 0.475 v bb 0.5 v bb 0.525 v bb vv bus _ cnt = (v il (l bus ) + v ih (l bus ))/2 slave termination r slave 20 30 47 k ? capacitance of slave node c slave 5 0p f 2.3 dc specifications (continued) dc specifications electrical characteristics: unless otherwise indicated, all limits are specified for v bb = 6.0v to 30.0v, t a = -40c to +125c parameter sym. min. typ. max. units conditions note 1: internal current limited. 2.0 ms maximum recovery time (r lbus = 0 ? , tx = 0.4 v reg , v lbus = v bb ). 2: node has to sustain the current that can flow under this condition; bus must be operational under this condition. downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 15 mcp2003/4/3a/4a 2.4 ac specifications ac characteristics electrical characteristics: unless otherwise indicated, all limits are specified for v bb = 6.0v to 27.0v; t a = -40c to +125c parameter sym. min. typ. max. units test conditions bus interface ? constant slope time parameters slope rising and falling edges t slope 3.5 22.5 s 7.3v <= v bb <= 18v propagation delay of transmitter t transpd 4 . 0 st transpd = max (t transpdr or t transpdf ) propagation delay of receiver t recpd 6 . 0 st recpd = max (t recpdr or t recpdf ) symmetry of propagation delay of receiver rising edge w.r.t. falling edge t recsym -2.0 2.0 s t recsym = max (t recpdf C t recpdr ) r rxd 2.4 ? to v cc , c rxd 20 pf symmetry of propagation delay of transmitter rising edge w.r.t. falling edge t transsym -2.0 2.0 s t transsym = max (t transpdf - t transpdr ) time to sample of fault /t xe for bus conflict reporting t fault 3 2 . 5 st fault = max (t transpd + t slope + t recpd ) duty cycle 1 @20.0 kbit/sec 0.396 c bus ; r bus conditions: 1nf; 1k ? | 6.8 nf; 660 ? | 10 nf; 500 ? th rec ( max ) = 0.744 x v bb , th dom ( max ) = 0.581 x v bb , v bb =7.0v C 18v; t bit = 50 s d1 = t bus _ rec ( min )/2 x t bit ) duty cycle 2 @20.0 kbit/sec 0.581 c bus ; r bus conditions: 1nf; 1k ? | 6.8 nf; 660 ? | 10 nf; 500 ? th rec ( max ) = 0.284 x v bb , th dom ( max ) = 0.422 x v bb , v bb =7.6v C 18v; t bit = 50 s d2 = t bus _ rec ( max )/2 x t bit ) duty cycle 3 @10.4 kbit/sec 0.417 c bus ; r bus conditions: 1nf; 1k ? | 6.8 nf; 660 ? | 10 nf; 500 ? th rec ( max ) = 0.778 x v bb , th dom ( max ) = 0.616 x v bb , v bb =7.0v C 18v; t bit = 96 s d3 = t bus _ rec ( min )/2 x t bit ) duty cycle 4 @10.4 kbit/sec 0.590 c bus ; r bus conditions: 1nf; 1k ? | 6.8 nf; 660 ? | 10 nf; 500 ? th rec (max) = 0.251 x v bb , th dom ( max ) = 0.389 x v bb , v bb =7.6v C 18v; t bit = 96 s d4 = t bus _ rec ( max )/2 x t bit ) wake-up timing bus activity debounce time t bdb 5 20 s mcp2003/2004 30 70 125 s mcp2003a/2004a bus activity to v ren on t bactve 35 150 s mcp2003/2004 10 30 90 s mcp2003a/2004a wake to v ren on t wake 1 5 0 s chip select to v ren on t csor 1 5 0 s v ren floating chip select to v ren off t cspd 80 s v ren floating downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 16 ? 2010-2014 microchip technology inc. 2.5 thermal specifications parameter symbol typ. max. units test conditions recovery temperature ? recovery +140 ? c shutdown temperature ? shutdown +150 ? c short circuit recovery time t therm 1.5 5.0 ms thermal package resistances thermal resistance, 8l-dfn ? ja 35.7 ? c/w thermal resistance, 8l-pdip ? ja 89.3 ? c/w thermal resistance, 8l-soic ? ja 149.5 ? c/w note 1: the maximum power dissipation is a function of t jmax , ? ja and ambient temperature t a . the maximum allowable power dissipation at an ambient temperature is p d = (t jmax - t a ) ?? ja . if this dissipation is exceeded, the die temperature will rise above 150 ? c and the device will go into thermal shutdown. downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 17 mcp2003/4/3a/4a 2.6 typical performance curves note: unless otherwise indicated, v bb = 6.0v to 18.0v, t a = -40c to +125c. figure 2-1: typical ibbq figure 2-2: typical ibbpd figure 2-3: typical ibbto note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 6 7.3 12 14.4 18 v bb (v) current (ma) -40c 25c 85c 125c 0 0.001 0.002 0.003 0.004 0.005 0.006 0.007 0.008 6 7.3 12 14.4 18 v bb (v) current (ma) -40c 25c 85c 125c 0 0.02 0.04 0.06 0.08 0.1 0.12 6v 7.3v 12v 14.4v 18v v bb (v) current (ma) -40c 25c 85c 125c downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 18 ? 2010-2014 microchip technology inc. 2.7 timing diagrams and specifications figure 2-4: bus timing diagram figure 2-5: cs to v ren timing diagram .95v lbus 0.05v lbus t transpdr t recpdr t transpdf t recpdf t xd l bus r xd internal t xd /r xd compare fault sampling t fault t fault fault /t xe output stable stable stable match match match match match hold value hold value 50% 50% .50v bb 50% 50% 0.0v t cspd t csor cs v ren v bb o ff downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 19 mcp2003/4/3a/4a figure 2-6: mcp2003/4 remote wake-up figure 2-7: mcp2003a/4a remote wake-up t bdb t bactive l bus 0.4v bb v bb v ren t bdb t bactive l bus 0.4v bb v bb v ren downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 20 ? 2010-2014 microchip technology inc. 3.0 packaging information 3.1 package marking information 8-lead pdip (300 mil) examples: 8-lead soic (150 mil) examples: examples : 8-lead dfn (4x4) legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week 01) nnn alphanumeric traceability code pb-free jedec ? designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e 2004a 1406 256 e/md ^^ 3 e e/p^^256 1406 mcp2003a 3 e mcp2003 e sn^^1406 256 3 e downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 21 mcp2003/4/3a/4a 8-lead plastic dual flat, no lead package (md) ? 4x4x0.9 mm body [dfn] note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging microchip technolog drawing c04-131e sheet 1 of 2 downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 22 ? 2010-2014 microchip technology inc. 8-lead plastic dual flat, no lead package (md) ? 4x4x0.9 mm body [dfn] note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging microchip technolog drawing c04-131e sheet 2 of 2 downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 23 mcp2003/4/3a/4a note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 24 ? 2010-2014 microchip technology inc. n e1 note 1 d 12 3 a a1 a2 l b1 b e e eb c downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 25 mcp2003/4/3a/4a note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 26 ? 2010-2014 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 27 mcp2003/4/3a/4a downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 28 ? 2010-2014 microchip technology inc. notes: downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 29 mcp2003/4/3a/4a appendix a: revision history revision f (november 2014) the following is the list of modifications: 1. updated typical application circuits with values used during esd tests. revision e (october 2013) the following is the list of modifications: 2. added additional specification for i hvren in section 2.3 ?dc specifications? . 3. clarified wake-up on l bus functionality. 4. added r xd monitoring description. revision d (december 2011) the following is the list of modifications: 5. added the mcp2003a and mcp2004a devices and related information throughout the document. 6. updated figures 1.2, 1.3, 1.4, 1.5, 2.6, 2.7. revision c (august 2010) the following is the list of modifications: 1. updated all references of sleep mode to power- down mode, and updated the max. parameter for duty cycle 2 in section 2.4 ?ac specifica- tions? . revision b (july 2010) the following is the list of modifications: 1. added section 2.2 ?nomenclature used in this document? , and added the capacitance of slave node parameter to section 2.3 ?dc specifications? . revision a (march 2010) original release of this document. downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 30 ? 2010-2014 microchip technology inc. notes: downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 31 mcp2003/4/3a/4a product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . part no. x /xx package temperature range device device: mcp2003: lin transceiver, with wake pins, wake-up on falling edge of l bus mcp2003t: lin transceiver, with wake pins, wake-up on falling edge of l bus (tape and reel) (dfn and soic only) mcp2003a: lin transceiver, with wake pins, wake-up on rising edge of l bus mcp2003at: lin transceiver, with wake pins, wake-up on rising edge of l bus (tape and reel) (dfn and soic only) mcp2004: lin transceiver with fault /t xe pins, wake-up on falling edge of l bus mcp2004t: lin transceiver with fault /t xe pins, wake-up on falling edge of l bus (tape and reel) (dfn and soic only) mcp2004a: lin transceiver with fault /t xe pins, wake-up on rising edge of l bus mcp2004at: lin transceiver with fault /t xe pins, wake-up on rising edge of l bus (tape and reel) (dfn and soic only) temperature range: e = -40c to +125c package: md = plastic dual flat, no lead package - 4x4x0.9mm body, 8-lead p = plastic dual in-line - 300 mil body, 8-lead sn = plastic small outline - narrow 3.90mm body, 8-lead examples: a) mcp2003a-e/md: extended temperature, 8l-dfn package b) mcp2003a-e/p: extended temperature, 8l-pdip package c) mcp2003a-e/sn: extended temperature, 8l-soic package d) mcp2003at-e/md: tape and reel, extended temperature, 8l-dfn package e) mcp2003at-e/sn: tape and reel, extended temperature, 8l-soic package a) mcp2004-e/md: extended temperature, 8l-dfn package b) mcp2004-e/p: extended temperature, 8l-pdip package c) mcp2004a-e/sn: extended temperature, 8l-soic package d) mcp2004at-e/md: tape and reel, extended temperature, 8l-dfn package e) mcp2004at-e/sn: tape and reel, extended temperature, 8l-soic package downloaded from: http:///
mcp2003/4/3a/4a ds20002230f-page 32 ? 2010-2014 microchip technology inc. notes: downloaded from: http:///
? 2010-2014 microchip technology inc. ds20002230f-page 33 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyers risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, flashflex, flexpwr, jukeblox, k ee l oq , k ee l oq logo, kleer, lancheck, medialb, most, most logo, mplab, optolyzer, pic, picstart, pic 32 logo, righttouch, spynic, sst, sst logo, superflash and uni/o are registered trademarks of microchip tec hnology incorporated in the u.s.a. and other countries. the embedded control solutions company and mtouch are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, ecan, in-circuit serial programming, icsp, inter-chip connectivity, kleernet, kleernet logo, miwi, mpasm, mpf, mplab certified logo, mplib, mplink, multitrak, netdetach, omniscient code generation, picdem, picdem.net, pickit, pictail, righttouch logo, real ice, sqi, serial quad i/o, total endurance, tsharc, usbcheck, varisense, viewspan, wiperlock, wireless dna, and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. gestic is a registered trademar ks of microchip technology germany ii gmbh & co. kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2010-2014, microchip technology incorporated, printed in the u.s.a., all rights reserved. isbn: 978-1-63276-803-2 note the following details of the code protection feature on microchip devices: microchip products meet the specification cont ained in their particular microchip data sheet. microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip products in a manner outside the operating specif ications contained in microchips data sheets. most likely, the person doing so is engaged in theft of intellectual property. microchip is willing to work with the customer who is concerned about the integrity of their code. neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as unbreakable. code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchips code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory an d analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem certified by dnv == iso/ts 16949 == downloaded from: http:///
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